Field detection logic

ABSTRACT

A system for processing a color bar code read optically from a coded medium is disclosed. The system includes logic for determining the binary code from color signals and storage means for temporarily storing the binary code. Logic is also provided which allows the reading of a double field tag and which checks the parity and the size of the captured message. Further, logic is provided for transmitting the captured message to a utilization device.

United States Patent 1 Gilberg et a1.

FIELD DETECTION LOGIC Inventors: Robert C. Gilberg, Dayton; James P.Donahue, Fairbom; Ramesh S. Patel, Kettering, all of Ohio The NationalCash Register Company, Dayton, Ohio Filed: Dec. 7, 1971 Appl. No.:205,542

[73] Assignee:

US. Cl. 235/6L11 E, 340/1463 K, 340/1463 B Int. Cl. G061: 7/12 Field ofSearch 238/92 CC, 61.11 E; 340/1463 B, 146.3 K

References Cited UNITED STATES PATENTS 11/1971 Kapsambelis 235/6l.l1 E

UTILIZATIW [11] 3,752,95 Aug. 14, 1973 3,558,862 1/1971 McMillan235/6l.11 E 3,562,494 2/1971 Schmidt 235/6l.1l E 3,671,722 6/1972Christie 340/1463 K Primary Examiner-Maynard R. Wilbur AssistantExaminer-Robert F. Gnuse Attorney -J. T. Cavender, Harry W. Barron etal.

[5 7] ABSTRACT A system for processing a color bar code read opticallyfrom a coded medium is disclosed. The system includes logic fordetermining the binary code from color signals and storage means fortemporarily storing the binary code; Logic is also provided which allowsthe reading of a double field tag and which checks the parity and thesize of the captured message. Further, logic is provided fortransmitting the captured message to a utilization device.

11 Claims, 30 Dran'lng Figures MAW BUFFER QAIN BUFFER I PULSE GEMRATORFIELD DETECTION LOGIC This invention relates to code detecting apparatusand more particularly to apparatus for detecting the code manifested bya series of three or more colored bars placed contiguously along a givenpath.

In todays world of business, it has become necessary to automaticallyinput information into a desired business machine. To effect thisdesire, a compact code is attached to a medium and scanned byappropriate reading apparatus. The medium may, for instance, be a retailprice tag, a credit card, a bank ledger card, or any other desired itemuseful for containing information. The coded information may include theprice and the article inventory number in case of a retail price tag, oran account number in the case of a credit card or bank ledger card.

()ne type of code utilizes a series of contiguous colored bars of threeor more different colors where each bar has a bar of a different coloron each side thereof. The Transition from one color to another color inthis code represents a binary bit, and the binary bits of alltransitions represent the desired information. The binary bits may begrouped by fours so that each group represents one decimal number. Amore complete description of this code is given in US. Pat. applicationSer. No. 837,850, filed June 30, 1969, by John B. Christie, now US. Pat.No. 3,671,722 and a reader for this code is described in U.S. Pat.application Ser. No. 837,514, filed June 30, 1969, by John B. Christie,Dzintars Abuls, and Wilfridus G. van Breukelen, now U.S. Pat. No.3,637,993 both of which applications are assigned to the presentassignee.

When a coded tag is being used, it is essential that the encodedinformation be accurately read. In this regard,

the tag includes size code and parity information which is read byreading apparatus. Thereafter, logic in the reading apparatus checks thedata against the size code and parity information to insure that thedata is accurate.

For this logic to properly operate, it is necessary to know at whatpoint in time the detecting apparatus is detecting the actual codedinformation, and not background colorsin the area. Otherwise false bitsof information would be captured.

Background of the Invention In accordance with one preferred embodimentof this invention, there is provided in a code reading system in whichscanning means scan a coded medium along a given path that includes aplurality of contiguous detectable indicia arranged in a coded format,each indicia having one of at least three detectably differentcharacteristics, the code being defined by transitions from an indiciumof one characteristic to an indicium of a different characteristic, thefirst detected and last detected indicium being detected for a longertime than the remaining indicia, logic for determining when saidplurality of indicia are being scanned. This logic includes means todetermine the time each of said indlcia is detected. means to provide afirst signal whenever the time for detecting a certain indicium is acertain amount less than the time for detecting the immediatelypreceding indicium. and means to provide a second signal whenever thetime for detecting a second Brief Description of the Drawings Thesubject matter of the invention is pointed out and distinctly claimed inthe concluding portion of the specification. The invention, however,both as to its organization and method of operation may best beunderstood by reference to the following description taken inconjunction with the accompanying drawings. in which:

FIG. 1A shows a single field color bar tag;

FIG. 1B shows a double field color bar tag;

FIG. 2A shows the general layout of a single field tag;

FIG. 2B shows the general layout of a double field 8;

FIG. 3 shows a specific layout of the color bars in a field of a colorbar tag;

FIGS. 4A and 4B show code detecting charts; and

FIG. 5 shows a general block diagram of the reading apparatus forreading the color bar tags shown in FIGS. 1A and 13.

It will be noted that the figures are numbered to correspond to thenumbering of the figures of the Gilberg et al. U.S. Patent No.3.717.750, referenced below.

Description of the Preferred Embodiment Referring now to FIG. 1A, thereis shown a typical single field tag 10 which can be used in a retailstore. Tag 10 includes data field 12 consisting of a plurality ofcolored bars placed contiguous to one another. The bars may be of threedifferent colors, such as green, black, and white, and the backgroundcolor of tag 10 may be white. In practice, the data field is printed byprinting the green and black bars and leaving a space for the whitebars. A printer for printing the tag 10 is described in US. Pat.application Ser. No. 51,073, filed June 30, 1970, by Donald E. Landisand entitled Color Bar Printer. Tag 10 also includes several series ofhuman readable printing 14, which manifests the essential informationcontained in the data field 12. This is provided so that the customerknows the price and also so that the information can be entered manuallyin the event of an equipment breakdown.

FIG. 1B shows a typical double field tag 20, which includes two colorbar coded data fields 22 and 24 separated by an area 25. Data field 22may include inventory control information such as department number,class number. stock keeping unit (5. k. u.) number, size, color, and soforth. This information is printed as human readable printing 26 to theside of data field 22. Data field 24 may include the price information,which is manifested by human readable printing 28. Data field 24 andprinting 28 can be detached from tag 20 along perforations 30 in theevent of a price change, and a new data field and associated printingmanifesting the new price can be affixed to complete tag 20 with theproper price information, or the price may be inserted manually, ifdesired.

Data fields 12, 22, and 24 may be scanned with a pen-like device whichis described in detail in the above-noted Christie et al. United Statespatent application and which provides a signal indicative of the colorof the bar then being scanned. These color signals are processed bylogic circuitry to obtain the desired information, which is thentransmitted to a utilization device, such as the retail sales terminaldescribed in U.S. Pat. application Ser. No. 71,971, filed Sept. 14,I970, by James E. Zachar and Walter E. Strode, Jr., now United StatesPatent 3,686,637, and entitled Retail Terminal, which is assigned to thepresent assignee.

Referring now to FIG. 2A, there is shown the general coded layout ofdata field 12 of single field tag 10. Data field 12 includes front andback control data portions 32 and 34 and data portion 36. Front controldata portion 32 includes a single direction bit, a four bit size code,and a two bit tag identification code. Back control data portion 34includes a single direction bit, a four bit size code, a two bit MOD3parity code, and a four bit block check code (B. C. C.) parity code.Data portion 36 may contain from 2 through 28 (even numbers only) fourbit binary coded decimal (B. C. D.) characters.

FIG. 2B shows the general coded layout of the data fields 22 and 24 ofdouble field tag 20. Data field 22 contains front control data portion38, data 1 portion 40, and back control data portion 42, and data field24 contains front control data portion 44, data 2 portion 46, and backcontrol data portion 48. Area 25 is be tween back control data portion42 and front control data portion 44. Front control data portions 38 and44 contain a single direction bit, a four-bit size code, and a two-bitidentification code. Back control data portions 42 and 48 contain asingle direction bit, a four-bit size code, a two-bit MOD3 parity code,and a four-bit B. C. C. parity code. Data 1 portion 42 and data 2portion 46 contain from 2 to 28 (even numbers only) fourbit B. C. D.characters.

FIG. 3 shows an example of a data field 50, which includes a pluralityof individual color bars 52a-52gg each contiguous with one another.Field 50 may be either field 12 or one of fields 22 or 24. Each of thebars 52 is labeled either W, G, or B to indicate whether they are arespective white, green, or black bar. On the left and right of datafield 50 are larger white areas 54 and 56, which are part of thebackground of the tag. If field 50 is one of the fields of a doublefield tag, one of the areas 54 or 56 will be area 25 shown in FIGS. 18or 2B. The colors of the bars 52a-52gg are so arranged that no bars ofthe same color are adjacent to each other.

In coded tags, such as those shown in FIGS. 1 through 3, it is desirablethat the coding be capable of being scanned in either direction; thatis, from top to bottom, or from bottom to top, in the case of FIG. 1,and from right to left or from left to right in the case of FIGS. 2 and3. To accomplish this in the code of FIG. 3, the leftmost bar 52a isgreen, and the rightmost bar 52gg is black. A forward direction scan isdefined when data field S is scanned from green bar 52a to black bar523g (left to right in FIG. 3), and a reverse direction scan is definedwhen data field 50 is scanned from black bar 52gg to green bar 520(right to left in FIG. 3). Logic within the reader (to be hereinafterexplained in detail) will look at the first binary bit detected andprovide a signal indicative of the direction scanned.

Before a discussion of the coding layout of FIG. 3 in detail, it isnecessary to understand the code itself. For this, reference is made toFIGS. 4A and 48, where two code decipher charts are shown. The color barcode is a transition code; that is. the transition from one color toanother color represents a binary digit (bit) of either l or O.Specifically, as shown by FIG. 4A, transitions from white to green,green to black, and black to white represent 0 bits, and, as shown byFIG. 4B, transitions from white to black, black to green, and green towhite represent 1 bits.

Referring again to FIG. 3, it is seen that the first transition in aforward direction scan is from white background area 54 to green bar52a, and this represents a 0 bit. On the other hand, the firsttransition in a reverse direction scan is from white background area 56to black bar 52gg, and this represents a 1 bit. Since the first bar 52awill always be green and the last bar 52gg will always be black, thefirst bit detected represents the direction of the scan. It should benoted that the bit values determined in a reverse scan will be inopposite order and the complement of the bit values obtained whilescanning in the forward direction. For instance, the last bit detectedin a forward direction scan will be a 0 bit due to the black bar 5233 towhite background area 56 transition, whereas this transition occursfirst and represents a I bit for a reverse direction scan.

For brevity hereinafter with respect to FIG. 3, the coding format ofdata field 50 will be described as being scanned in the forwarddirection, it being understood that for a reverse direction scanoppositely ordered complementary bits are provided. Bars 52h-52c formthe front size code and are selected so that the transitions to thosebars will give the complement of one more than the number of eight-bitcharacters in the data portion, with the most significant bit of thefront size code being scanned first. It should be noted that eacheight-bit character includes two four-bit B. C. D. digits. Thus, thenumber of four-bit B. C. D. characters will be (ZN-2), where N is thesize code number which is defined by the complement of the front sizecode.

The bars 52f and 52g form an identification code (I. D.) to indicatewhether a single field tag, such as the tag 10, or a double field tag,such as the tag 20, is being scanned. If the transitions to these barsproduce the binary code 0--0, a single field tag is being scanned; ifthe transitions to these bars produce the binary code 0-l (mostsignificant digit first), the first data field of a double field tag isbeing scanned; and if the transitions to these bars produce the binarycode 1-], the second data field of a double field tag is being scanned.For a reverse direction scan, these binary codes will be reversed andcomplemented.

Next, the data contained in the data field is scanned by determining thetransitions to bars 52h through 52w. As previously mentioned, each foursuccessive bars constitute a B. C. D. character, and there are (2N'2) B.C. D. characters of data, where N is the number in the size code,arranged most significant character first, with each B. C. D. characterbeing arranged least significant bit first.

After the data of the data field 50 is detected, bars 52x-52aa arescanned, and the transitions to these bars provide the four-bit B. C. C.parity code. The B. C. C. parity code is determined by adding the 1 bitsin each significant position of each B. C. D. character, and dividingthis sum by two, the remainder being the B. C. C. code. For example, forthe four B. C. D. characters 0-1-0-0, 0-0-1-1, 1-0-0-1, and 0-!1-0(least significant digit first), the B. C. C. code is calculated asfollows: 3

remainder (B. C. C.)

Thus, the B. C. C. Parity code is 1-0-0-0.

After the B. C. C. parity code has been detected, a two-bit MOD3 paritycode is detected by finding the transition to bars 52bb and 52cc. Thesetwo bits will insure that the last bar 523g will be black in addition toaffording a second parity check. The MOD3 parity code is determined bycounting the total number of 1 bits and bits in the entire data field,excluding the MOD3 parity code, dividing each of these sums by 3, andadding a sufficient number of 1 bits as the MOD3 parity code to make theremainders equal. For example, if in a data field there are 1 bits and12 0 bits, the MOD3 code is calculated as follows:

divide 0 total by 3 20/3 6, remainder 2 divide 1 total by 3 12/3 4,remainder 0 remainder difference: 2 Thus, two 1 bits are needed to makethe remainders equal, so the MOD3 parity code will be l-l.

Following the MOD3 parity code is the back size code, which isdetermined by the transition to bars 52dd through 52 3. In the case ofthe back size code, the true values of the bits are scanned, leastsignificant bit first. Thus, the back size code is in opposite order andcomplementary to the front size code. This results in the second throughfifth bits of the code being the same regardless of whether the datafield is scanned in a forward or a reverse direction. The final bit inthe data field 50 will be the direction bit defined by the transitionfrom bar 52gg to background area 56, and this will be the same as theoriginal direction bit defined by the transition from background area 54to bar 52a.

Referring now to FIG. 5, a generalized block diagram of the Color BarReader 60 is shown. A color bar field 62 is scanned by an opticalpen-shaped probe 64. Light rays indicative of the color then beingscanned are transmitted through a fiber optic bundle 66 to ColorDetector Circuit 68. Color Detector Circuit 68 provides three pulseshaped signals which indicate the color then being scanned. If a whitecolor bar is scanned, the WHL signal is a logic 0 signal, and the GNLand BKL signals are logic 1 signals. Similarly, if a respective green orblack color bar is being scanned, the respective GNL or BKL signals arelogic 0, and the other two signals are logic I signals. A detaileddescription of the probe 64, the fiber optic bundle 66, and the ColorDetector Circuit 68 is given in the abovementioned Christie et al.United States patent application.

The three color signals Wl-IL, GNL, and BKL are applied to Data DecoderMeans 70, which provides a DA- TAlN signal, which is the binary codedsignal of the code in data field 62. The DATAIN signal is applied toInput Buffer Means 72, and, after eight bits have been applied thereto,the RGIXCP signal becomes logic I and causes the eight bits in InputBuffer Means 72 to be transferred as the 1888 signal to characterposition one of the Main Buffer Means 74.

Main Buffer Means 74 includes a 136-bit Main Buffer A 76 and a second136-bit Main Buffer B 78, each of which has respective control circuitsMBA Control Means 80 and MBB Control Means 82 associated therewith. Fora single field tag, or the first scanned field of a double field tag,the information detected is stored in Main Buffer A 76, and, for thesecond scanned field of a double field tag, the information detected isstored in Main Buffer B 78. The term first scanned field is defined tobe data field 22 in FIG. 2B for a forward direction scan and data field24 for a reverse direction scan. The term second scanned field isdefined to mean field 24 for a forward direction scan and field 22 for areverse direction scan.

Upon command of the RGIXGP signal, an eight-bit character is shiftedfrom Main Buffer Means 74 through Output Buffer Control Logic 84 andOutput Buffer Means 86 to Interface Means 88. Interface Means 88interfaces the Reader 60 with an appropriate Utilization Device 89, suchas the Terminal Control Unit shown in the above-cited Zachar et al.United States patent application and further described in US. Pat.application Ser. No. 72,084, filed Sept. 14, 1970, by Ralph D. Haney etal. now US. Pat. 3,702,988, and entitled Digital Processor," which isassigned to the present assignee. Before Interface Means 88 transmitsany data to Utilization Device 89, the data must be checked to insureits accuracy. For this, the remainder of Reader 60 is provided.

The WI-IL, GNL, and BKL signals from Color Detector Circuit 68 are alsoapplied to a Beginning Of Field (BOF) Counter Means 90, and End Of Field(EOF) Counter Means 92 and Transition Detector Means 94. BOF CounterMeans 90 counts the time the WHL signal is logic 0 and compares thistime to the time the next GNL or BKL signal is logic 0. If it turns outthat the GNL or BKL signal time is less than one fourth the WI-IL signaltime, the BOF signal becomes a logic I. This indicates that a transitionfrom the white background color to the first bar has occurred.Similarly, EOF Counter Means 92 counts the time a BKL or a GNL signal islogic 0 and compares this time to the time the immediately subsequentWI-IL signal (if any) is logic 0. If the WHL signal is logic 0 fourtimes as long as theprevious GNL or BKL signal, the EOF signal becomeslogic 1. This indicates that the last transition of the data field hasoccurred.

Every time a color transition occurs and a DATAIN bit is provided,Transition Detector Means 94 provides an LDNB signal and a TRANSTB7signal, and these signals are applied to BC8 Counter Means 96. The LDNBsignal is also applied to Input Buffer Means 72 to enable the DATAIN bitto be applied thereto. BC8 Counter Means 96 increments its count fromone to eight each time the LDNB signal occurs and the count therein atany time equals the number of bits stored in Input Buffer Means 72.

In addition to BC8 Counter Means 96, four other counters are included inReader 60. These are Register Position Counter Means 98, Index RegisterCounter Means 100, Limit Register Counter Means 102, and Gross Time Out(GTO) Counter Means 104. Register Position Counter Means 98 is afree-running counter which continually counts from one to 17. It is usedto keep track of the information in Main Buffer Means 74. Index RegisterCounter Means 100 works in conjunction with Register Position CounterMeans 98 to load and unload data into and out of Main Buffer Means 74.It is incremented by each BC8 pulse provided from BC8 Counter Means 96.Limit Register Counter Means 102 is used in conjunction with IndexRegister Counter Means 100 to compare the length of the data, to addfour dummy bits into Input Buffer Means 72, and to detect the end ofdata. It is used in conjunction with Register Position Counter Means 98to detect the end of message and initiate the parity check. The sizecode from Output Buffer Means 86 is applied to Limit Register CounterMeans 102 and stored therein for future reference. GTO Counter Means 104is a switchable counter which provides a PENUP signal either if probe 62scans the same color for either one fourth of a second or one second,depending upon whether a color bar, or area 25, shown in FIGS. 18 and2B, is being scanned. It is incremented by the RSTRPC signal providedfrom Register Position Counter Means 98 and reset by each TRANSTB7 pulsefrom Transition Detector Means 94. The PENUP signal is provided onefourth of a second after the last transition in case a bar is beingscanned and after one second in case area 25 of a double field tag isbeing scanned. The switchability of GTO Counter Means 104 is controlledby the size code and the ID code in the first scanned data field. v V WRegister Position Counter and Index Register Counter (R. P. C. and I. R.C.) Compare Means 106 provides an eight-bit-long RGIXCP signal everytime the count in Register Position Counter Means 98 equals the count inIndex Register Counter Means 100. This signal allows the data transferbetween Input Buffer Means 72 and Main Buffer Means 74 and between MainBuffer Means 74 and Output Buffer Means 86. Register Position Counterand Limit Register Counter (RPC & LRC) Compare Means 108 provides anRGLRCP pulse signal whenever the count in Register Position CounterMeans 98 equals the count in Limit Register Counter Means 102. LimitRegister Counter and Index Register Counter (LRC & IRC) Compare Means110 provides an LRIXCP signal whenever the count in Limit RegisterCounter Means 102 equals the count in Index Register Position CounterMeans 98.

After the entire data field has been scanned, it is necessary to providean End Of Data (EOD) signal. This signal is provided after two size codechecks have been performed by Size Code Check Means 112. The first sizecode check is comparing the first size code detected with the secondsize code detected and is accomplished as follows. After the first eightbits are detected and stored in Input Buffer Means 72, they aretransferred to both Main Buffer Means 74 and Output Buffer Means 86,causing the first detected size code to be stored in Output Bufier Means86. After the last data bit is detected from the tag and the EOF signalbecomes logic I, the second detected size code is in Input Buffer Means72. At this time, the size codes in both Input Buffer Means 72 andOutput Buffer Means 86 are applied to Size Code Check Means 112 as theGED and IBB8 signals and compared with one another. The second size codecheck is performed by also applying the OED signal to Limit RegisterCounter Means 102, so that the size code is also stored therein. Itshould be noted that at this time (after the EOF signal) the count inIndex Register Counter Means 100 will be one less than the total numberof eight-bit characters detected, since the last detected character isstill in Input Buffer Means 72 and the count in Limit Register Counter102 reflects the size code number, which is two less than the totalnumber of eight-bit characters scanned. If the front and back size codesproperly compare in Size Code Check Means 112, the count in LimitRegister Counter Means 102 is increased by two, and the count in IndexRegister Counter Means is increased by one. If all bits of the code havebeen detected, this should make the count in Index Register CounterMeans 100 equal the count in Limit Register Counter Means 102, therebycausing the LRIXCP signal to become a logic 1. When the RGIXCP signalbecomes logic 1, the BOD signal will become logic 1, indicating that thetwo size code checks have been successfully completed.

If one or both of the two size code checks are unsuccessful, it is stilldesirable for the BOD signal to become logic 1. This will occur afterthe GTO counter 104 provides the logic 1 PENUP signal, due to probe 64remaining on white background area 56 in FIG. 3.

After the size code has been checked, the B. C. C. and MOD3 parity ofthe captured data is checked. The EOD signal is applied to Parity LoopControl Logic 1 14 and causes the SCPYOT signal and the PTYSEQ signal tobe set to logic 1. The SCPYOT signal is applied to Character PulseGenerator Means 116 and sets the CI-IPLOT signal for one character time(eight bit times). This causes Index Register Counter Means 100 to beset to a count of one, and, when Register Position Counter Means 98 hasa count of one, the RGIXCP signal becomes logic 1 for one charactertime. This clears Index Register Counter Means 100 and causes the firsteight control bits stored in the first position of Main Buffer Means 74to be shifted into Output Buffer Means 86. The size code in these eightbits is then shifted to Limit Register Counter Means 102, and two isadded to the count in Limit Register Counter Means 100, so that thecount therein corresponds to the number of characters in Main BufferMeans 74.

At this time, the PYCKFF signal is set to logic 1, and resets the SCPYOTsignal and causes the Cl-IPLOT signal from Character Pulse GeneratorMeans 116 to be set for one character time. This, in turn, causes acount of one to be placed in Index Register Counter Means 100, and' theRGIXCP signal becomes logic 1 when the count in Register PositionCounter Means 98 becomes one. Now the RGIXCP signal is held at logic 1until the count in Register Position Counter Means 98 matches the countin Limit Register Counter Means 108; that is, until the RGLRCP signalbecomes logic 1. During this time, all of the bits in Main Buffer Means74 are shifted through Parity Check Logic Means 118, and the B. C. C.and MODS parity of the data stored in Main Buffer Means 74 is checked.If the parity check is successful, then the PYCKFF and PTYSEQ signalsare reset to logic 0.

At this time, the data has been completely checked and is ready to betransmitted to Utilization Device 89. After the PTYSEQ signal is reset,the SCDTOT signal from Data Loop Logic Means 120 is set. This signalsets the CHPLOT signal to logic 1 for one character time and causes acount of one to be placed in Index Register Counter Means 100. When thenext RGIXCP signal occurs, the first character in Main Bufier Means 74is shifted into Output Buffer Means 86, and the size code portionthereof is placed in Limit Register Counter Means 102. Then the DATAOTsignal becomes logic 1, and the data transfer commences.

If the tag had been scanned in the forward direction, the CI-IPLOTsignal is set for two character times, causing a count of two to beplaced in Index Register Counter Means 100. When the RGIXCP signalbecomes logic 1. the first eight-bit character of true data is shiftedfrom position two in Main Buffer Means 74 to Output Buffer Means 86.Upon command of Utilization Device 89, the data in Output Buffer Means86 is then right shifted and transmitted through Interface Means 88 toUtilization Device 89. During this time,

. Index Register Counter Means 100 is incremented by one, and, upon thenext logic 1 RGIXCP signal, the next eight bits of data are transferredto Output Bufier Means 86. This sequence continues until the count inIndex Register Counter Means 100 equals the count in Limit RegisterCounter Means 102. Then, when the last data character is sent to OutputBuffer Means 86, the LRIXCP signal becomes logic 1 and indicates that nomore data is to be sent.

If the tag had been scanned in the reverse direction, the data stored inMain Buffer Means 74 would have been stored in opposite order andcomplementary to the data which is to be sent to Utilization Device 89.In this case, the SCDTOT signal causes the size code to additionally beloaded into Down Counter 122. Whenever the count in Down Counter 122 isfifteen or less, a one-character-long DWINSP signal is produced, andthis signal is applied through CI-IPLOT control gate 124 to provide alogic 1 FDBKDOT signal, since the REVDAT signal is true for a reversescan. The F DBKDOT logic 1 signal sets the CI-IPLOT signal, whichremains logic 1 for N+l character times, where N is the size code. Foreach character time the CI-IPLOT signal is logic I, a count of one issubtracted from the count in Down Counter 122, and a count of one isadded to the count in Index Register Counter Means 100. Further, forevery character time after four that the CI-IPLOT signal is logic 1, acount of one is subtracted from the count in Limit Register CounterMeans 102. Thus, when the CHPLOT signal returns to logic 0 after N+lcharacter times, Limit Register Counter Means 102 has a count of three,Index Register Counter Means 100 has a count of N+l, and Down Counter122 has a count of zero. The count of three in Limit Register CounterMeans 102 is the position in Main Buffer Means 74 of the leastsignificant character of data, and the N+l count in Index RegisterCounter Means 100 is the position in Main Buffer Means 74 of the mostsignificant character of data. Special logic is also provided forsituations when the size code is three or two, and this is described indetail hereinafter. When the RGIXCP signal becomes logic 1, the mostsignificant character of data is transferred from Main Buffer Means 74to Output Buffer Means 86. This is the same data that would be firsttransferred if a forward scan occurred, except that it is in oppositeorder and complementary thereto. This data is complemented and leftshifted out of Output Buffer Means 86 and transmitted through InterfaceMeans 88 to Utilization Device 89, and a count of One is subtracted fromthe count in Index Register Counter Means 100.

The above procedure repeats itself until the count in Index RegisterCounter Means 100 matches the count in Limit Register Counter Means 102,at which time the LRIYCP signal becomes logic 1, indicating that thelast character is being transferred from Main Buffer Means 74 to OutputBuffer Means 86 and the entire message has been read from Main BufierMeans 74.

For a complete understanding of the reading apps ratus of FIG. 5 and ofthe present invention which is embodied in such reading system. U.S.Patent application. Serial No. 205.543. filed December 7, 1971,

"invention claimed herein.

now US. Patent No. 3,717,750, issued February 20. 1973, entitled InputControl Logic for a Code Reading System by Robert C. Gilberg,James P.Donohue. and Ramesh S. Patel and assigned to the assignee of the presentinvention is hereby incorporated by reference herein and made a part ofthe instant application. More particularly, FIGS. 14A through 14L of thedrawings and column 13, line 2 through column 87, line 26, are referredto as being pertinent to the What is claimed is: 1. In a code readingsystem in which scanning means scans a coded medium along a given paththat includes a plurality of contiguous detectable indicia arranged in acoded format, each indicia having one of at least three detectablydifferent characteristics, said code being defined by transitions froman indicium of one characteristic to an indicium of a differentcharacteristic, the first detected and last detected indicium having thesame characteristic and being detected for a longer amount of time thanthe remaining indicia, said scanning means providing one of a first, asecond, or a third indicium signal whenever said scanning means scans anindicium having a respective one of a first, a second or a thirddetectably different characteristic, logic for determining when saidplurality of indicia are being scanned comprising:

means responsive to said first, second and third indicium signals todetermine the amount of time each of said indicia is detected, saidmeans including a first counter means and a second counter means, saidfirst counter means being reset to a zero count upon the occurrence ofsaid first indicium signal and said second counter means being reset tozero upon the occurrence of either said second indicium signal or saidthird indicium signal, said first and second counter means, after beingreset to zero count, counting as long as the indicium signal causingthem to be reset is provided, the counts of said first and secondcounter means being operated upon after the signal provided by saidscanning means changes, said counter means thereafter counting; meansresponsive to the count of said first counter means for providing afirst signal .whenever the amount of time for detecting a certainindicium is a certain amount less than the amount of time for detectingthe immediately preceding indicium; and

means responsive to the count of said second counter means for providinga second signal whenever the amount of time'for detecting a secondcertain indicium is a certain amount greater'than the amount of time fordetecting the immediately preceding indicium.

2. This invention according to claim 1 wherein said first signal isprovided in response to the count in said first counter when the nextfollowing scanning means indicium signal change occurs, and said secondsignal is provided when the count of said second counter reaches a givenvalue.

3. The invention according to claim 1 wherein the count in said firstcounter is operated upon by dividing it by a given amount and invertingit; and

wherein said first signal is provided at the point in time said nextfollowing scanning means indicium llll signal change occurs as long assaid counter is not saturated.

4. The invention according to claim 3 wherein said count in said firstcounter is divided by four.

5. The invention according to claim 1 wherein the count in said secondcounter is operated upon by being inverted;

wherein said second counter thereafter counts up at a slower rate thanprior to said count being operated upon; and

wherein said second signal is provided when said second counter becomessaturated.

6. The invention according to claim 5 wherein said slower rate is onefourth of the prior counting rate.

7. In combination:

an encoded medium on which is positioned a series of contiguous colorbars of first, second and third colors, said medium having a backgroundarea of said first color, there being a path on said medium traversingsaid series of bars and a portion of said background area on each sideof said series of bars, the background area on each side of said seriesof bars traversed by said path being wider than the width of said barsalong said path;

detecting means for being scanned along said path and for providing oneof a first, second, or a third signal whenever respective first, secondor third colors are scanned;

first counter means responsive to said first, second, and third signalscapable of counting between first and second values, said first countermeans including means for resetting said first counter means to saidfirst value upon the occurrence of said first signal, said first countermeans thereafter counting towards said second value, said first countermeans further including means for dividing the then existing countthereof by a given value and complementing said divided value at thetime one of said second or third signals occur following the occurrenceof said first signal,-said first counter means thereafter countingtowards said second value;

first decoding means for providing a beginning signal after said one ofsaid second or third signals no longer is provided in the event saidfirst counter means has not counted past a third value which is betweensaid first and second values;

second counter means responsive to said first, second and third signalscapable of counting between fourth and fifth values, said second countermeans including means for resetting said second counter means to saidfourth value upon the occurrence of said second or said third signalssaid second counter means thereafter counting towards said fifth valueat a given rate, said resetting means further resetting the count ofsaid second counter means to the complement of the then-existing countthereof upon the occurrence of said first signal, said second countermeans thereafter counting towards said fifth value at a second rate,which is less than said given rate; and

second decoding means for providing an ending signal when the count ofsaid second counter reaches said fifth value.

8. The invention according to claim 7;

wherein said first value is zero;

wherein said second value is two to the nth power;

and

wherein said third value is two to the n minus two power.

9. The invention according to claim 8;

wherein said given value is four; and

wherein said detecting means detects said background area on each sideof said bars for at least four times as long as any bar is detected.

10. The invention according to claim 7:

wherein said fourth value is zero;

wherein said fifth value is two to the nth power;

wherein said second rate is one fourth of said given rate; and 1 whereinsaid detecting means detects said background area on each side of saidbars for at least four times as long as any bar is detected.

11. The invention according to claim 10:

wherein said first value is zero;

wherein said second value is two to the n plus one power;

wherein said third value is two to the n minus one power; and

wherein said given value is four.

1. In a code reading system in which scanning means scans a coded mediumalong a given path that includes a plurality of contiguous detectableindicia arranged in a coded format, each indicia having one of at leastthree detectably different characteristics, said code being defined bytransitions from an indicium of one characteristic to an indicium of adifferent characteristic, the first detected and last detected indiciumhaving the same characteristic and being detected for a longer amount oftime than the remaining indicia, said scanning means providing one of afirst, a second, or a third indicium signal whenever said scanning meansscans an indicium having a respective one of a first, a second or athird detectably different characteristic, logic for determining whensaid plurality of indicia are being scanned comprising: means responsiveto said first, second and third indicium signals to determine the amountof time each of said indicia is detected, said means including a firstcounter means and a second counter means, said first counter means beingreset to a zero count upon the occurrence oF said first indicium signaland said second counter means being reset to zero upon the occurrence ofeither said second indicium signal or said third indicium signal, saidfirst and second counter means, after being reset to zero count,counting as long as the indicium signal causing them to be reset isprovided, the counts of said first and second counter means beingoperated upon after the signal provided by said scanning means changes,said counter means thereafter counting; means responsive to the count ofsaid first counter means for providing a first signal whenever theamount of time for detecting a certain indicium is a certain amount lessthan the amount of time for detecting the immediately precedingindicium; and means responsive to the count of said second counter meansfor providing a second signal whenever the amount of time for detectinga second certain indicium is a certain amount greater than the amount oftime for detecting the immediately preceding indicium.
 2. This inventionaccording to claim 1 wherein said first signal is provided in responseto the count in said first counter when the next following scanningmeans indicium signal change occurs, and said second signal is providedwhen the count of said second counter reaches a given value.
 3. Theinvention according to claim 1 wherein the count in said first counteris operated upon by dividing it by a given amount and inverting it; andwherein said first signal is provided at the point in time said nextfollowing scanning means indicium signal change occurs as long as saidcounter is not saturated.
 4. The invention according to claim 3 whereinsaid count in said first counter is divided by four.
 5. The inventionaccording to claim 1 wherein the count in said second counter isoperated upon by being inverted; wherein said second counter thereaftercounts up at a slower rate than prior to said count being operated upon;and wherein said second signal is provided when said second counterbecomes saturated.
 6. The invention according to claim 5 wherein saidslower rate is one fourth of the prior counting rate.
 7. In combination:an encoded medium on which is positioned a series of contiguous colorbars of first, second and third colors, said medium having a backgroundarea of said first color, there being a path on said medium traversingsaid series of bars and a portion of said background area on each sideof said series of bars, the background area on each side of said seriesof bars traversed by said path being wider than the width of said barsalong said path; detecting means for being scanned along said path andfor providing one of a first, second, or a third signal wheneverrespective first, second or third colors are scanned; first countermeans responsive to said first, second, and third signals capable ofcounting between first and second values, said first counter meansincluding means for resetting said first counter means to said firstvalue upon the occurrence of said first signal, said first counter meansthereafter counting towards said second value, said first counter meansfurther including means for dividing the then existing count thereof bya given value and complementing said divided value at the time one ofsaid second or third signals occur following the occurrence of saidfirst signal, said first counter means thereafter counting towards saidsecond value; first decoding means for providing a beginning signalafter said one of said second or third signals no longer is provided inthe event said first counter means has not counted past a third valuewhich is between said first and second values; second counter meansresponsive to said first, second and third signals capable of countingbetween fourth and fifth values, said second counter means includingmeans for resetting said second counter means to said fourth value uponthe occurrence of said second or said third signals said second couNtermeans thereafter counting towards said fifth value at a given rate, saidresetting means further resetting the count of said second counter meansto the complement of the then-existing count thereof upon the occurrenceof said first signal, said second counter means thereafter countingtowards said fifth value at a second rate, which is less than said givenrate; and second decoding means for providing an ending signal when thecount of said second counter reaches said fifth value.
 8. The inventionaccording to claim 7; wherein said first value is zero; wherein saidsecond value is two to the nth power; and wherein said third value istwo to the n minus two power.
 9. The invention according to claim 8;wherein said given value is four; and wherein said detecting meansdetects said background area on each side of said bars for at least fourtimes as long as any bar is detected.
 10. The invention according toclaim 7: wherein said fourth value is zero; wherein said fifth value istwo to the nth power; wherein said second rate is one fourth of saidgiven rate; and wherein said detecting means detects said backgroundarea on each side of said bars for at least four times as long as anybar is detected.
 11. The invention according to claim 10: wherein saidfirst value is zero; wherein said second value is two to the n plus onepower; wherein said third value is two to the n minus one power; andwherein said given value is four.